High speed digital systems, whether for computational or communications purposes, rely on the ability to correctly ascertain the logical value of a binary data signal at specific times. A series of such consecutive logical values will represent either data or control information, and if satisfactory performance is to be achieved in a modern high speed system the error rate in ascertaining the logical values may need to be very low, often only one error in 1012 bits, or even less. In a digital system there are abrupt transitions between the logical values, and the nominal period of time that the data signal represents a particular logical value is called the UI (for Unit Interval). Generally there is provided (or derived) another signal, called a clock signal, whose period is also the UI and whose abrupt transitions in a selected direction serve as the ‘specific times’ (mentioned above) at which the logical value of the data signal is to be ascertained, a process often termed ‘sampling.’
In an ideal world, all edges in the data signal would occur at locations along a time axis that were an exact UI apart, or at exact multiples of the unit interval. Likewise, the transitions in the clock signal would always occur at locations along the time axis that describe exactly a series of consecutive unit intervals. It is common for the phase of the clock signal to be adjusted relative to the transitions in the data signal such that the sampling according to the clock signal will occur in the middle of the unit interval of the data signal. That is, while the UI of the data signal is the same as the UI of the clock signal, their edges don't coincide, but are instead staggered.
The ‘rattle’ in the edges of a signal that is supposed to transition only at particular times (here, at the expiration of consecutive unit intervals) is called jitter. In today's high performance digital systems, the presence of jitter in the data signal and in the clock has a significant effect on the system's ability to correctly ascertain the logical value of the data signal. There are other error causing mechanisms, to be sure, but if a high speed digital system is to offer good performance it needs to have low jitter (say, 1/1000 UI RMS, or less).
To reduce jitter one generally has to locate its source, and it turns out that it is useful and productive to recognize several different types of jitter. It is now common for test equipment intended for use with high performance digital systems to include in their repertoire of operations automated measurements of jitter, and to do so while recognizing several different types of jitter, each of which can be separately characterized. Total jitter is the aggregate amount of observable jitter, and is (or ought to be) the ‘sum’ of all the various types of component jitter that can be recognized.
There are wide variations among techniques for jitter measurement. In particular, there are some ‘brute force’ techniques that perform all of N-many trials, and which can seem to take forever (hours, or even days!) to get accurate results having resolution in parts in 1012. Even if the UI is one nanosecond, it still takes over twenty minutes to measure 1012 of them. And some techniques require N-many repetitions of a suitable test pattern that is in the range of one hundred or a thousand UI in length. Clearly, such brute force approaches are not suitable for quickly characterizing expected low rates of jitter.
Various strategies have been developed to cope with this situation. These often revolve around assuming that some of the jitter is random in nature, with the rest arising from various other mechanisms. The idea is that, if the nature of a component source of jitter is known, then it can be represented by a suitable model. The significance of this is that, while the model needs coefficients to produce greater or lesser amounts of jitter, the shape of the probability distribution of that jitter component is specific to the model, so that the particular coefficients for a specific instance can be found by curve fitting techniques operating on a proper collection of samples. The plan (for, say, random jitter) is to sample for a reasonable amount of time, do a curve fit to instantiate the model, and then let the model predict with some confidence what we would get if we let the measurement run to conclusion using brute force techniques. Clearly, if that is the plan, then we need to have at hand data that represents only that one kind of jitter; otherwise the model will be inaccurate.
Now a new set of difficulties arises. The measured data will contain the effects of all the different types of jitter. These include Periodic Jitter, Random Jitter and Data Dependent Jitter that is correlated with the content of the data itself. It is not possible to readily directly measure samples that pertain to only a particular component type of jitter, since we can't observe those types in isolation: the measured data will generally include the combined effects of all types of jitter. Not only must indirect methods be developed to separate from the combined result the data for individual types of jitter (so that models or other analysis can be applied to appropriate data), but there is more than one way to decompose into components the combined jitter that is actually measured.
We are particularly interested here in a jitter measurement technique for discovering Data Dependent Jitter and that is useable in a real time Digital. Sampling Oscilloscope (DSO) or comparable environment to produce credible and valid results in seconds instead of hours. While there are various techniques that are known for measuring Total Jitter and separating out Data Dependent Jitter, each suffers from some disadvantage. For example, one technique operates quickly, but does not preserve observed frequency information for Periodic Jitter, which is useful diagnostic information for an attempt to eliminate such jitter. As a second example, another technique does not readily allow the combining of multiple measurements to obtain a more accurate answer. Still another disadvantage of some conventional techniques is that they require repetitions of a particular test signal, and may not accommodate an arbitrarily long test sequence. This means the system must, at least to some degree, be removed from service for testing. There is a need for a Data Dependent Jitter measurement technique using a real time DSO or Timing Analyzer that operates quickly, preserves useful ancillary information, whose resolution scales with longer measurement times, and that tolerates a test sequence of arbitrary length and content that might either be random or be actual ‘live’ data measured while the system was in operational use. It should also be able to measure not only the timing jitter of edges in the signal, but also characterize voltage variations exhibited in the asserted logic levels (HIGH/LOW, TRUE/FALSE). What to do?